Ale tak nalijme si čistého vína a řekneme, že tohle je prostě prasárna a u jiných, podobně nebo víc výkonných procesorů stačí místo tohohle nastavit 2 až 3 registry (a to ještě ani v tom kódu pro STMko nemám povolení interruptů což byla další plechovka červů)
// ____ ____
// X +--+ XO | | / | ____ ____
// ### |25M +---+PLLM+---+ | | / |
// +--+____| |____| |VCO +-+-+PLLP+-+-sysclk
// +-+____| | |____| |
// | ____ | ____ |
// | | * | | | / | |
// +-+PLLN+-+-+PLLQ+-)-gpioclk
// |____| |____| | ____
// | |/MCO|
// +-+1PRE+---MCO1
// |____|
// 25 /16 1,5625 300 /2 150 << sysclk
// *192 /6 50 << gpioclk
// /3 50 << MCO1
RCC->CR |= RCC_CR_HSEON; // spustit XO
while(!(RCC->CR & RCC_CR_HSERDY)); // pockat na stabilizaci HSE
FLASH->ACR = 4 << dekkt(FLASH_ACR_LATENCY) | FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN; // FLASH delicka
RCC->CFGR = 5 << dekkt(RCC_CFGR_MCO1PRE) | 3 << dekkt(RCC_CFGR_MCO1) // delicky pro periferie a MCO (50 M)
| 5 << dekkt(RCC_CFGR_PPRE1) | 4 << dekkt(RCC_CFGR_PPRE2); // 37,5 a 75 M
RCC->PLLCFGR = 0x20000000 | 6 << dekkt(RCC_PLLCFGR_PLLQ) | RCC_PLLCFGR_PLLSRC //PLL
| 0 << dekkt(RCC_PLLCFGR_PLLP) | 192 << dekkt(RCC_PLLCFGR_PLLN) | 16 << dekkt(RCC_PLLCFGR_PLLM);
RCC->CR |= RCC_CR_PLLON; // spustit PLL
while(!(RCC->CR & RCC_CR_PLLRDY)); // pockat nez se stabilizuje PLL
RCC->CFGR |= 2 << dekkt(RCC_CFGR_SW); // prepnout SYSCLK na PLL
z = 100;
while(z --);
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN | RCC_APB2ENR_TIM8EN | RCC_APB2ENR_SYSCFGEN;
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN | RCC_AHB1ENR_GPIOEEN;
z = 100;
while(z --);
GPIOA->AFR[0] = 0xB0000BB0; // 1=REFCLK; 2=MDIO; 3=INT#; 7=CRS; 8=MCO
GPIOB->AFR[1] = 0x00BBB000; // 11=txEN; 12=txD0; 13=txD1
GPIOC->AFR[0] = 0x00BB00B0; // 1=MDC; 4=rxD0; 5=rxD1
GPIOA->MODER = 0xA8028029;
GPIOB->MODER = 0x0A900280;
GPIOC->MODER = 0x55555A59;
GPIOE->MODER = 0x00015555;
GPIOA->OSPEEDR = 0xFFFFFFFF; //Nastaveni slew rate (max)
GPIOB->OSPEEDR = 0xFFFFFFFF;
GPIOC->OSPEEDR = 0xFFFFFFFF;
GPIOD->OSPEEDR = 0xFFFFFFFF;
GPIOE->OSPEEDR = 0xFFFFFFFF;
PHYRES0;
z = 1000;
while(z --);
RCC->AHB1RSTR = RCC_AHB1RSTR_ETHMACRST;
SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL; //RMII
RCC->AHB1ENR |= RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN | RCC_AHB1ENR_ETHMACRXEN | RCC_AHB1ENR_ETHMACPTPEN
| RCC_AHB1ENR_CCMDATARAMEN | RCC_AHB1ENR_BKPSRAMEN | RCC_AHB1ENR_DMA2EN;
RCC->AHB1RSTR = 0;
PHYRES1;